Si5391 is an ‘any-frequency’ clock generator with up to 12 outputs and sub-100fs RMS phase jitter.

A precision calibrated version (‘P-grade’) typically achieves 69fs RMS phase jitter and can create the primary frequencies needed in 56Gbit/s serdes designs. The firm describes it as a ‘true sub-100 fs clock-tree-on-a-chip’ meeting 56G PAM-4 reference clock jitter requirements with margin.