Electronic component search engine Based on the more open goal of RICS-V, the release of SweRV means that third parties can use it in their own chip designs, which not only promotes specific core designs, but also promotes RISC-V architecture.
Western Digital released the free RISC-V kernel SweRV, when can it replace x86?
Feb
02
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Western Digital recently released SweRV, a self-developed general architecture based on the RISC-V instruction set. The SweRV kernel is one of several Digital RISC-V projects from Western Digital as part of their efforts to lead the ISA (instruction set architecture) and its ecosystem, or part of their transition to an unlicensed CPU core.
Based on the more open goal of RICS-V, the release of SweRV means that third parties can use it in their own chip designs, which not only promotes specific core designs, but also promotes RISC-V architecture.
Based on the more open goal of RICS-V, the release of SweRV means that third parties can use it in their own chip designs, which not only promotes specific core designs, but also promotes RISC-V architecture.